Our Top Courses
There are no shortcuts, but there is a better way to get there. Let us show you how.
About Course
In the HIL Fundamentals Using VeriStand Course, you will learn how to use the out-of-the-box features of VeriStand to develop real-time testing applications.
Benefits of the course
- Apply VeriStand to your real-time test application needs
- Create user interfaces for data visualization and control
- Import and configure models for simulation of system plants and controllers
- Deploy VeriStand software to your Real-Time target
- Configure DAQ, XNET, SLSC, FPGA, and Custom Devices for use in VeriStand
- Create mappings between model I/O, hardware I/O, channels, and aliases
- Protect system hardware with alarms and procedures
- Stimulate and log responses of Devices Under Test with Real-Time Sequences and Stimulus Profiles
- Log and report test data with NI DIAdem
- Automate tests using TestStand, Python, or ASAM XIL
- Benchmark, optimize, and troubleshoot VeriStand applications
- Configure distributed systems
Course Content
-
Introduction
00:22 -
Terminology of Real-Time Test
02:01 -
Matching Pairs
-
Terminology of Closed Loop Control
01:43 -
Examples of Real-Time and Closed Loop Tests
00:58 -
Knowledge Check
-
Summary
00:38
-
Introduction
00:29 -
Types of Closed Loop Control Testing
04:51 -
Reusing Test Components
01:53 -
Knowledge Check
-
Summary
00:25
-
Introduction
00:32 -
What is VeriStand?
00:27 -
How Does VeriStand Fit in the Real-Time Test Framework?
01:50 -
Real-Time Test and the VeriStand Engine
00:33 -
VeriStand Engine Architecture
00:47 -
Knowledge Check
-
Summary
00:29
-
Introduction
00:50 -
Lobby
00:51 -
Navigation Panes
02:39 -
Mapping Diagram
01:20 -
System Explorer Window
00:34 -
Screen and Workspace
00:47 -
Matching Pairs
-
Configuring a Real-Time Target
01:30 -
Creating and Deploying a Project
00:43 -
Demonstration: Creating and Deploying a Project
03:42 -
Knowledge Check
-
Summary
00:26
-
Introduction
00:43 -
VeriStand Screens
00:51 -
Controls and Indicators
01:40 -
Demonstration: Configuring VeriStand Screens
04:39 -
Workspace Configuration
02:29 -
Knowledge Check
-
Summary
00:40
-
Introduction
01:02 -
What is a Model?
02:01 -
Where Do I Get a Model?
00:31 -
Building Models from the MathWorks, Inc. Simulink® Software
01:06 -
Generating Modules from C++ Codes
02:34 -
Compiling LabVIEW Models
01:35 -
Matching Pairs
-
Demonstration: Compiling LabVIEW Models
03:47 -
Knowledge Check
-
Summary
00:36
-
Introduction
00:54 -
Models in VeriStand
01:38 -
Demonstration: Importing Models
01:18 -
Changing Model Settings
01:40 -
Demonstration: Importing Parameters and Signals
04:17 -
Knowledge Check
-
Summary
00:28
-
Introduction
00:52 -
Models in VeriStand Engine
01:00 -
Model Execution
05:16 -
Model Parameters and Signals
00:49 -
Demonstration: Model Execution
03:53 -
Knowledge Check
-
Summary
00:27
-
Introduction
00:52 -
Mapping Channels Manually
01:09 -
Demonstration: Mapping Channels Manually
03:36 -
Demonstration: Bundling Wires
01:38 -
Importing and Exporting System Mappings
00:36 -
Knowledge Check
-
Summary
00:32
-
Introduction
01:31 -
Alias Overview
02:02 -
Demonstration: Creating an Alias
03:49 -
Knowledge Check
-
Summary
00:35
-
Introduction
00:50 -
User Channels and Calculated Channels
01:43 -
Calculated Channel Settings
00:59 -
Demonstration: Creating User Channels and Calculated Channels
03:28 -
Knowledge Check
-
Summary
00:32
-
Introduction
01:10 -
Incorporating Hardware in Your Real-Time Test System
04:49 -
Exploring NI MAX
03:35 -
Connect to Your RT Target in VeriStand
00:38 -
Demonstration: Installing Software and Connecting to VeriStand
08:00 -
Activity – Deploying VeriStand Software
00:17 -
Knowledge Check
-
Summary
00:25
-
Introduction
01:10 -
What is a DAQ Device?
03:20 -
Adding DAQ Devices and Channels
03:48 -
Sample Modes
00:58 -
Using DAQ Waveforms
02:45 -
Demonstration: Configuring DAQ Devices
06:18 -
Knowledge Check
-
Summary
00:27
-
Introduction
01:06 -
What is NI-XNET?
02:50 -
Configuring NI-XNET in VeriStand
01:57 -
NI-XNET Frames
02:59 -
Matching Pairs
-
Using the XNET Bus Monitor
00:55 -
Demonstration: Using NI-XNET with VeriStand
05:23 -
Knowledge Check
-
Summary
00:25
-
Introduction
01:05 -
Custom Device Overview
01:47 -
Obtaining and Using Custom Devices
04:01 -
Custom Devices in the VeriStand Engine
01:12 -
Demonstration: Using Custom Devices
03:25 -
Knowledge Check
-
Summary
00:37
-
Introduction
00:59 -
What is NI SLSC?
02:03 -
Adding an SLSC Device
01:42 -
Demonstration: Configuring SLSC Modules
03:39 -
Knowledge Check
-
Summary
00:31
-
Introduction
01:12 -
What is FPGA?
02:47 -
Using the FPGA Add-on
02:27 -
Demonstration: Adding an FPGA Device with FPGA Add-on
02:28 -
FPGA in VeriStand – Standard FPGA Framework
02:12 -
Demonstration: Using FPGA in VeriStand
02:15 -
Knowledge Check
-
Summary
00:55
-
Introduction
01:07 -
Scales Overview
02:10 -
VeriStand Scales
02:56 -
Demonstration: Adding and Mapping Scales
04:41 -
Additional Scaling Options
01:07 -
Knowledge Check
-
Summary
00:40
-
Introduction
01:04 -
Alarm Overview
01:27 -
Adding and Configuring Alarms
02:10 -
Manage Alarms at Run-Time
00:25 -
Demonstration: Creating and Using Alarms
03:52 -
Knowledge Check
-
Summary
00:32
-
Introduction
00:55 -
Procedure Overview
01:42 -
Procedure Configuration and Execution
02:19 -
Demonstration: Using Alarms and Procedures
03:53 -
Knowledge Check
-
Summary
00:33
-
Introduction
01:28 -
Stimulus Profile and Real-Time Sequence Overview
03:42 -
Real-Time Sequences
03:03 -
Demonstration: Creating a Real-Time Sequence
09:28 -
Real-Time Sequence Options
01:37 -
Stimulus Profiles
02:13 -
Matching Pairs
-
Demonstration: Creating Stimulus Profiles
04:01 -
Knowledge Check
-
Summary
00:31
-
Introduction
00:54 -
Python Overview
03:22 -
Using Python for RT Sequences
01:32 -
Demonstration: Using Python for RT Sequences
06:10 -
Matching Pairs
-
Summary
00:24
-
Introduction
01:12 -
Data Logging Overview
01:21 -
Host Side: VeriStand Editor Logging Specifications
03:12 -
Demonstration: VeriStand Editor Logging
04:07 -
Host Side: Workspace Logging
01:53 -
Host Side: Stimulus Profile Logging
01:38 -
Target Side: Embedded Data Logger
02:05 -
Demonstration: Embedded Data Logger
06:21 -
Target Side: DAQ Waveform Logging
01:38 -
Target Side: CAN Frame Logging
01:38 -
Knowledge Check
-
Summary
01:05
-
Introduction
00:51 -
Introduction to VeriStand Automation
06:10 -
Automation Using Python
02:06 -
Demonstration: Using Python to Automate VeriStand
02:13 -
Knowledge Check
-
Summary
00:30
-
Introduction
00:58 -
Introduction to ASAM XIL
01:43 -
ASAM XIL Steps in TestStand
01:52 -
Demonstration: Using ASAM XIL TestStand Steps for Automation
04:36 -
Knowledge Check
-
Summary
00:43
-
Introduction
00:58 -
Visualizing System State
00:43 -
Viewing VeriStand Engine Performance with System Channels
03:20 -
Matching Pairs
-
Diagnostics and Benchmarking with the Telemetry Custom Device
02:01 -
Knowledge Check
-
Summary
00:17
-
Introduction
01:14 -
Distributed System Overview
01:14 -
Multiple Targets
01:15 -
Multiple Hosts
00:58 -
Data Sharing Framework
00:58 -
Reflective Memory
01:37 -
Expansion I/O
00:30 -
Knowledge Check
-
Summary
00:32
$515.00
$1,030.00
- Lessons173
- Quizzes34
- Skill LevelIntermediate
- LanguageEnglish
- Course Duration 8h
Tags
Target Audience
- New NI VeriStand users
- Engineers creating real-time test systems such as hardware-in-the-loop test systems, dynamometers, or servo hydraulic test systems
- Test technicians tasked with executing and modifying existing NI VeriStand test systems
- Users and technical managers evaluating NI VeriStand for their applications
HIL Fundamentals Using Veristand
$515.00
$1,030.00
Hi, Welcome back!