Developing Custom FPGA Code Using LabVIEW FPGA – NI Learning Center

Overview

Developing Custom FPGA Code Using LabVIEW FPGA course delivers a learning experience for designing, prototyping, and deploying reliable LabVIEW FPGA code for your application. At the end of the course, you will be able to translate your embedded system requirements into a scalable software architecture, choose appropriate methods for inter-process communication, design, deploy and replicate your FPGA code for your embedded application.

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NI

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Developing Custom FPGA Code Using LabVIEW FPGA

Category:

FPGA

LabVIEW

0

0

Enrollments

Level

Intermediate

Time to Complete:

5 hours 0 minute

Lessons:

123

Certificate:

No

One-time for 1 person

$650.00$515.00

Overview

Developing Custom FPGA Code Using LabVIEW FPGA course delivers a learning experience for designing, prototyping, and deploying reliable LabVIEW FPGA code for your application. At the end of the course, you will be able to translate your embedded system requirements into a scalable software architecture, choose appropriate methods for inter-process communication, design, deploy and replicate your FPGA code for your embedded application.

What You’ll Learn?

Design, prototype, and deploy LabVIEW FPGA code.

Acquire and generate analog and digital signals, control timing, and implement signal processing on FPGA.

Explore functionalities for maximum performance and reliability using the LabVIEW FPGA Module.

Explore debugging, benchmarking, and testing your LabVIEW FPGA application.

Requirements

LabVIEW Core 1

LabVIEW Core 2

Syllabus Overview

123

Lessons

32

Quizzes

0

Tasks

2

Resources

🟢 Exploring LabVIEW FPGA Projects

01 Introduction to FPGA

Introduction

00:28

Introduction to FPGA

02:41

FPGA Components

08:00

Knowledge Check

Summary

02 Exploring LabVIEW FPGA Module

Introduction

00:28

Developing an FPGA VI

06:18

Demonstration: Creating an FPGA VI

02:33

Interactive Front Panel Communication

01:34

Knowledge Check

Summary

03 Selecting Execution Mode

Introduction

00:20

Selecting an Execution Mode

03:20

Demonstration: Exploring Simulation Execution Mode

03:00

Knowledge Check

Summary

04 Compiling FPGA VI

Introduction

00:17

Compiling an FPGA VI

08:18

Demonstration: Compiling and Executing a VI

03:55

Knowledge Check

Summary

05 Exploring Compilation Considerations

Introduction

00:24

Exploring Additional Compilation Options

06:22

Exploring LabVIEW FPGA Code Optimizations

04:40

Knowledge Check

Summary

🟢 Using LabVIEW FPGA IO and Timing

06 Configuring FPGA I/O

Introduction

00:17

Configuring FPGA I/O

02:17

Adding FPGA IO

Configuring FPGA I/O: FPGA I/O Palettes

00:32

Demonstration: Placing I/O Nodes

02:12

Knowledge Check

Summary

07 Exploring LabVIEW FPGA I/O Types

Introduction

00:34

Exploring Data Types in LabVIEW FPGA

05:10

Handling FPGA I/O Errors

02:14

Knowledge Check

Summary

08 Controlling Loop Execution Rates

Introduction

00:21

Setting Loop Execution Rates

06:29

Matching Activity

Demonstration: Exploring the Timing Control Structure of a LabVIEW FPGA VI

01:40

Knowledge Check

Summary

09 Synchronizing C Series Modules

Introduction

00:13

Synchronization Considerations

04:22

Knowledge Check

Summary

10 Timing Considerations for LabVIEW FPGA VI

Introduction

00:28

Creating Delays between Events

01:16

Measuring Time between Events

03:07

Benchmarking Loop Periods

01:26

Activity: Exploring Benchmarking Code

Summary

11 Exploring the Fixed-Point Data Type

Introduction

00:15

Using Fixed-Point Data Type: Fixed-Point Data Type Overview

01:42

Demonstration: Exploring the Fixed-Point Data Type

02:05

Using Fixed-Point Data Type: Fixed-Point Terminology

03:32

Matching Activity

Demonstration: Configuring Fixed-Point Data Type

03:40

Using Fixed-Point Data Type: Fixed-Point Configuration

07:52

Knowledge Check

Summary

12 Exploring the Single-Precision Floating-Point Data Type

Introduction

00:17

Using Single-Precision Floating-Point Data Type

04:55

Demonstration: Signal Processing in LabVIEW FPGA

01:10

Knowledge Check

Summary

🟢 Communicating Processes in LabVIEW FPGA

13 Reviewing Additional Signal Processing Options in LabVIEW FPGA

Introduction

00:28

Performing FPGA Math & Analysis

03:35

Integrating Third-Party Intellectual Property (IP)

03:15

Knowledge Check

Summary

14 Exploring Parallel Loops on LabVIEW FPGA

Introduction

00:18

Exploring Parallel Loops on FPGA

02:54

Knowledge Check

Summary

15 Transferring Latest Data (Tag) in LabVIEW FPGA

Introduction

00:13

Transferring Latest Data (Tag)

00:25

Exploring Items to Store and Access Data on FPGA

Demonstration: Creating Target-Scoped Memory Items

02:40

Demonstration: Comparing Channel Wires and Streams

02:49

Knowledge Check

Summary

16 Deploying FPGA VI

Introduction

00:14

Deploying an FPGA VI

05:25

Knowledge Check

Summary

17 Transferring Latest Data (Tag) from FPGA to RT

Introduction

00:17

Transferring Latest Data (Tag)

04:13

Demonstration: Transfer Tag Data between FPGA and RT

05:48

Knowledge Check

Summary

18 Transferring Buffered Data (Stream, Message) from FPGA to RT

Introduction

00:19

Transferring Buffered Data (Stream, Message): DMA FIFO Overview

03:36

Demonstration: Configuring a DMA FIFO

01:22

Transferring Buffered Data (Stream, Message): Using DMA FIFO

05:54

Demonstration: Exploring DMA FIFO Interleaving

02:18

Knowledge Check

Summary

19 RT to FPGA Synchronization and Health Monitoring

Introduction

00:29

Synchronizing the RT VI and FPGA VI

03:12

Exploring an FPGA Watchdog

01:17

Knowledge Check

Summary

20 Transferring Buffered Data (Stream, Message) in LabVIEW FPGA

Introduction

00:14

Using FIFOs to Transfer Buffered Data in LabVIEW FPGA

01:33

Exploring Types of FIFOs

Matching Activity

Demonstration: Writing and Reading Elements to and from FPGA FIFOs

01:28

Using FIFOs to Transfer Buffered Data in LabVIEW FPGA: Handling FIFO Overflow and Underflow

00:44

Matching Activity

Summary

21 Exploring FPGA Optimizations for FPGA Code

Introduction

00:32

Optimization Use Cases

01:01

Optimization Techniques for FPGA Size

03:05

Demonstration: Multiplexing a Large Algorithm

01:23

Optimization Techniques for Speed/Throughput

00:57

Knowledge Check

Summary

22 Exploring Single-Cycle Timed Loop Execution

Introduction

00:17

Exploring SCTL Principles

06:23

Matching Activity

Demonstration: Exploring Loop Speed: While Loop vs. Single-Cycle Timed Loop

02:25

Knowledge Check

Summary

23 Timing Considerations Using SCTLs

Introduction

00:16

Executing Code in Single-Cycle Timed Loops

04:31

Matching Activity

Knowledge Check

Summary

24 Troubleshooting and Optimizing Code on SCTL

Introduction

00:30

Troubleshooting Code inside SCTL

03:24

Demonstration: Fixing SCTL Errors

02:49

Optimizing Code Using SCTL

03:36

Interactive Exploration

Knowledge Check

Summary

25 Exploring Pipelining in LabVIEW FPGA

Introduction

00:15

Implementing Pipelining

06:03

Demonstration: Using Pipelining to Speed Up LabVIEW FPGA Code

03:27

Knowledge Check

Summary

26 Exploring Four-Wire Handshaking

Introduction

00:16

Exploring Different Techniques to Implement Four-Wire Handshaking in LabVIEW FPGA

11:28

Knowledge Check

Summary

27 Debugging and Testing FPGA Code

Introduction

00:17

Exploring Techniques to Debug and Test LabVIEW FPGA Code: Using Simulation Mode

02:54

Demonstration: Using Sampling Probes for Debugging

05:31

Exploring Techniques to Debug and Test LabVIEW FPGA Code: Desktop Execution Node

00:40

Demonstration: Debugging with Desktop Execution Node

01:18

Exploring Techniques to Debug and Test LabVIEW FPGA Code: Unit Testing for LabVIEW FPGA

00:30

Matching Activity

Summary

Material Includes

Instructor(s)

NI

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